1. Field of the Invention
This invention relates generally to data converters, and more particularly to a buffer circuit to control the differential pair output switch of a current steering digital-to-analog converter (DAC).
2. Description of the Prior Art
Implementing a current steering digital-to-analog converter with BiCMOS technology allows use of NPN bipolar junction transistors. NPN devices are very desirable in the design of output switches that direct current to either the true or complement output. Output switches are generally configured as differential pair circuits, one for each controlled current in the DAC.
A differential pair output switch 10 with current source 12 is illustrated in FIG. 1. The output switch 10 requires a differential voltage between the bases of the differential pair transistors 14, 16 in order to completely switch the current to either the true or complement output of the DAC. It is necessary for this current to completely switch to only one output of the DAC at a time.
FIG. 2 is a simplified schematic diagram illustrating a well known buffer circuit 20 typically used in the art to control the output switch differential pair 14, 16. It can be seen that the prior art buffer circuit 20 includes a differential pair common emitter amplifier circuit with a resistive load 22, 24. Buffer circuit 20 functions by creating a differential output voltage from a differential input voltage.
The output voltage of the differential pair 14, 16 as a function of input voltage is also well known and is illustrated in FIG. 3. With reference now to FIG. 3, it can be seen that the emitter coupled pair 14, 16 creates a differential output voltage of zero for a differential input voltage of zero. Further, it can be seen that the common mode output voltage 30 of the buffer 20 is constant and equal to one-half the single-sided output swing of the differential pair 14, 16.
Looking again at FIG. 2, the common emitter node 22 of the differential output switch 10 acts as a rectifier and xe2x80x9cfollowsxe2x80x9d the higher output of the differential buffer 20. This rectifier action results in the common emitter node 22 of the output switch 10 moving by one-half the single-sided output swing of the buffer 20. This voltage change on the common emitter node 22 during a switching event will lead to a transient error current
Ic=Cdv/dt, 
where C is the capacitance on the common emitter node 22. This error current will ultimately result in distortion of the output signal of the digital-to-analog converter.
In view of the foregoing, there is a need for a system and method for reducing the error current at the common emitter node of the output switches associated with a current steering digital-to-analog converter (DAC).
The present invention provides a circuit and method for reducing the error current at the common emitter node of the output switches associated with a current steering digital-to-analog converter (DAC).
In one aspect of the invention, a circuit is provided that controls the differential pair output switch of a current steering DAC.
In another aspect of the invention, a circuit is provided that acts to reduce the movement of the common emitter node of the output switch during a switching event in a current steering DAC.
In still another aspect of the invention, a circuit is provided that acts to increase the common mode level as the magnitude of the differential mode level decreases for a differential pair output switch of a current steering DAC. This increase in common mode voltage of the output for a decrease in the magnitude of the differential output results in less movement at the common emitter node of the output switch differential pair during a switching event.
According to one embodiment of the present invention, a buffer circuit functions as a differential pair having a high output signal crossover. The buffer circuit includes a traditional common emitter differential pair having a resistive load, but also includes an additional NPN device and resistor. The base node of the NPN device is connected to the highest input voltage level to the buffer circuit, i.e. the positive supply if it is shared. The additional NPN device and resistor act to divert an increasing amount of current away from either differential pair load resistor as the magnitude of the differential pair input to the buffer approaches zero. As the magnitude of the differential input increases, the common mode level will decrease back to one-half the single sided output swing. The common mode output voltage therefore does not remain constant during a switching event.